1. Field of the Invention
This invention relates to electrically programmable semiconductor memory devices and methods of manufacture thereof, and particularly to a method for manufacturing an electrically programmable antifuse with substantially reduced capacitance by forming a minimum size aperture in a semiconductor material for containing the antifuse dielectric, the aperture having a cross section less than the conventional minimum photolithographic feature size.
Integrated logic circuits which can be configured or programmed by the user for a specific application are becoming increasingly popular. These circuits are called programmable read only memory (PROM) circuits and are programmed by either selectively breaking or creating a series of programmable links. Programmable links are electrical interconnects which are broken or created as selected electronic nodes in the circuit by the user after the integrated circuit device has been fabricated and packaged. Such programming is undertaken in order to activate or deactivate, respectively, selected electronic nodes such that a PROM device may be programmed to perform a desired function.
Fusible links formerly were used extensively in PROM devices and are well known. A PROM device usually consists of an X-Y matrix or lattice of conductors or semiconductors. At each cross-over point of the lattice, a conducting link connects a transistor or other electronic node to the lattice network. The PROM device is programmed by providing a high programming current to predesignated fusible links which connect to selected nodes. Links are then blown out to create an open circuit. The combination of blown and unblown fusible links represents a digital bit pattern of ones and zeros signifying the logic configuration which the user wishes to store in the PROM device.
Fusible links present several disadvantages in terms of excessive power dissipation needed for developing the relatively high programming voltages. Fusible link memory cells also present problems in terms of excessive size and concomitantly reduced memory capacity. A fusible like cell must be disadvantageously large in order to accommodate the fusible link and an associated selection transistor which develops the high current needed to blow the link. Fusible links therefore take up an excessively large amount of valuable space on a semiconductor die.
In order to overcome the foregoing disadvantages of fusible links, another type of programmable link, called an antifuse link, has been developed for use in integrated circuit applications. Instead of a programming mechanism for causing an open circuit as is the case with the fusible link, the programming mechanism for an antifuse creates a short circuit or a relatively low resistance link. Antifuse links consist typically of two conductor and/or semiconductor electrodes separated by some kind of dielectric or insulating material.
In programming, the dielectric at a selected point between the electrodes is broken down by a current developed from a predetermined programming voltage applied to the electrodes of selected antifuse links to thereby form a conductive filament electrically connecting the electrodes and forming a closed circuit or relatively low resistance link.
Antifuse elements such as those disclosed in U.S. Pat. No. 4,823,181 are extremely useful in PROM devices due to their extremely small size. All that is required in forming an effective antifuse is that the dielectric layer between the two electrodes, when disrupted by a high electric field, will facilitate the flow of electrons from one of the two electrodes to produce a conductive filament during breakdown of the dielectric. The size of the conductive filament is generally a function of the programming voltage pulse and the composition of the dielectric structure of the antifuse. Typically, the radius of the conductive filament may be in a range of from 0.02 microns to 0.2 microns.
In a PROM device consisting of a matrix of antifuse elements, it is crucial to minimize the capacitance of unprogrammed antifuses. Each unprogrammed antifuse essentially consists of a capacitor, that is, two electrodes separated by a dielectric material. Therefore, a plurality of unprogrammed antifuses on a single line of the matrix will act as a plurality of capacitors connected in parallel, wherein the capacitance of the line will be the sum of the capacitances of all unprogrammed antifuses. Accordingly, if the total capacitance of a plurality of unprogrammed antifuses in a PROM or logic device is large enough, it will severely slow down data signals and greatly impair device operation. It is therefore essential to minimize the capacitance of each antifuse element in order to insure proper device operation.
2. The Prior Art
In the prior art, the minimum size of an antifuse was severely limited by the constraints of the conventional photolithographic process. For example, the most effective way to substantially reduce or minimize capacitance in an antifuse element is to reduce the cross sectional area of the dielectric. In the prior art, the minimum size of an aperture for containing an antifuse dielectric could only be made as small as a conventional photolithographic feature size would allow.
An antifuse may be conventionally fabricated as part of a standard CMOS masking process by first forming an N+ diffusion region in a semiconductor substrate. The N+ region defines a first electrode. A silicon dioxide layer is then formed over the substrate and N+ region. In order to produce an aperture for the antifuse dielectric, an aperture is to be formed in the silicon dioxide layer over the N+region. Using conventional photolithographic techniques, a masking resist is generally placed over the silicon dioxide and a hole is generated in the resist masking area. Next the silicon dioxide is etched out. This results in the resist aperture being larger than the feature size on the glass masking plate due to lateral encroachment of the light during exposure of the mask. In addition, during etching, the undercutting of material by the etchant contributes to creating a larger sized aperture. Also, the aperture in the silicon dioxide is even larger than aperture image in the resist. Accordingly, in the prior art it was not possible to create an aperture for the antifuse dielectric having a size smaller than the minimum feature size. As a result of processing, the aperture would always be larger than the minimum feature size of the mask pattern in the overlying semiconductor layers.
As antifuse dimensions become smaller, the feature size of the resist masking layers must also be decreased. However, there is a lower limit to photolithographic feature sizes beyond which it is impossible to achieve smaller size due to the constraints inherent in conventional photolithography. This is often referred to as the "minimum feature size. "
The inability of the prior art to provide a method for forming an antifuse aperture smaller than the minimum photolithographic feature size is a serious constraint to the use of antifuses. Because of this structure, antifuses can be made smaller than will ever be possible using conventional photolithography. For example, an antifuse needs to be only a few hundred angstroms in diameter. Currently, the minimum size of an antifuse is on the order of one micron. This relatively large size is due to the constraints upon minimum geometries which are inherent in conventional photolithography techniques. As a result, antifuses formed by conventional photolithographic techniques usually have disadvantageously large parasitic capacitance in their unprogrammed state. This tends to degrade the speed performance of circuits containing them.
Accordingly, there is a great need for a method for making an aperture for an antifuse as small as possible. Ideally there is a great need for a method for making an antifuse having a diameter of only a few hundred angstroms. This would provide the advantage of potentially eliminating the parasitic capacitance of unprogrammed antifuses.
Accordingly, it is an object of the present invention to provide an electrically programmable low impedance antifuse element having a cross-sectional area smaller than is possible through conventional photolithographic techniques.
It is another object of the present invention to provide a method for producing a minimum size aperture, smaller than is possible thorough conventional photolithographic process steps for forming an antifuse.
It is yet another object of the present invention to provide a method for forming an antifuse having a cross-sectional area smaller than a minimum photolithographic feature size currently allowed, such that a matrix of such minimum geometry antifuses provides only negligible parasitic capacitance.
Another object of the present invention is to provide a method for making an antifuse having a minimum cross section smaller than that obtainable by conventional photolithographic process steps but which is manufacturable using available semiconductor processing techniques.